Electrical devices sometimes include semiconductor substrates to form electrical components such as transistors. High voltages and continuous operation sometimes result in a build up of charge in the substrate near the transistors which may decrease threshold voltages of the transistors and may lead to formation of a parasitic lateral bipolar transistor in the substrate. Draining built-up charge from the substrate near the transistors may reduce such issues. However, architectures for making electrical contact with the substrate may increase fabrication complexity, may increase fabrication cost may occupy valuable space and may lack satisfactory performance.